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From: csc@orchid.UUCP
Newsgroups: comp.arch
Subject: Spurious Rumours
Message-ID: <10652@orchid.waterloo.edu>
Date: Mon, 14-Sep-87 23:29:38 EDT
Article-I.D.: orchid.10652
Posted: Mon Sep 14 23:29:38 1987
Date-Received: Wed, 16-Sep-87 04:12:10 EDT
Reply-To: Please don't.
Distribution: comp
Organization: U of Waterloo, Ontario
Lines: 26
Confusion: U. of Waterloo, Ontario

I've been reading a book (Systems Design with Advanced Microprocessors,
John Freer, 1987) which mentioned the following in its rundown of 68020
relatives:

...
 > d)  MC68030  which   integrates  an  MC68020,   a  subset  of  the  MC68851
 > programmable   memory  management   unit  (using  a   22-entry  translation
 > lookahead [sic] buffer) and separate 256-byte  instruction and data caches.
 > Performance is thus increased by 1.5 to 2.5 times when these new facilities
 > are used  but  the  improvement  in  performance  is  approximately  50 per
 > cent for  MC68020  compiled  code  run  on  a 20 MHz  MC68030.   The  cache
 > is reorganized as 16 entries of four 32-bit words,  the same as the Z80000,
 > and  the internal  bandwidth is  increased to  80 Mbyte/s.   Other improve-
 > ments  include   1.2 um  CHMOS  (300 000  transistors)  and  a  burst  mode
 > for filling the caches from memory.
 > 
 > e)  A  RISC  version  of  the  MC68020  is  also  planned  and  the  future
 > MC68040  is expected to have a larger data bus  and internal 128-bit regis-
 > ters.


  I thought I'd throw this out for criticism and comment.

	-Colin Plumb (ccplumb@watmath)

Note: My account doesn't exist yet, so I'm posting from another.