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From: doug@edge.UUCP (Doug Pardee)
Newsgroups: comp.arch
Subject: Re: brash micros versus the Big Iron: not yet
Message-ID: <945@edge.UUCP>
Date: Mon, 14-Sep-87 17:58:03 EDT
Article-I.D.: edge.945
Posted: Mon Sep 14 17:58:03 1987
Date-Received: Thu, 17-Sep-87 05:19:56 EDT
References: <622@winchester.UUCP> <1980@sfsup.UUCP>
Organization: Edge Computer Corporation, Scottsdale, AZ
Lines: 20

[Note: my employer *definitely* has a vested interest in this, but I
don't speak for them.]

> In considering why RISC is such a big win, the most important thing is
> not so much that complex instructions do more than they have to, but
> that implementing them takes more chip area, and therefore slows down
> ALL of the instructions.  What makes the RISC processors so fast is that
> all this extra chip area is devoted to pipelining, caches, etc.

Er, all of this presumes that you're hell-bent on making a single-chip CPU.

We here at Edge make a nice little machine which has a fully 68010
compatible instruction set, and which executes most instructions in
one clock cycle (just like them there RISC machines).

No, it doesn't fit on one chip.  More like a dozen.

But then, our memory boards have more than one chip on 'em too  :-)
-- 
Doug Pardee, Edge Computer; ihnp4!oliveb!edge!doug, seismo!ism780c!edge!doug