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From: nather@ut-sally.UUCP (Ed Nather)
Newsgroups: comp.unix.wizards,comp.arch
Subject: Re: Double-bit errors and ECC memory
Message-ID: <9024@ut-sally.UUCP>
Date: Wed, 16-Sep-87 10:34:31 EDT
Article-I.D.: ut-sally.9024
Posted: Wed Sep 16 10:34:31 1987
Date-Received: Fri, 18-Sep-87 07:18:34 EDT
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Organization: U. Texas CS Dept., Austin, Texas
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Xref: mnetor comp.unix.wizards:4273 comp.arch:2196


Henry Spencer's suggestion that automatic error correction be included right
in the memory chip is a good one, but I fear it won't happen soon, if at all.
We users are so hungry for more memory we put size at a great premium, and
the chip designers respond. If they are given a choice of more (uncorrected)
bits vs. fewer (corrected) ones, I doubt they'd choose the latter.  

Chip real estate is expensive: yield is a non-linear function of chip size,
so tacking ECC manipulations on top of, say, a 4 Mbit memory chip would be
very costly.  Maybe some day ...

-- 
Ed Nather
Astronomy Dept, U of Texas @ Austin
{allegra,ihnp4}!{noao,ut-sally}!utastro!nather
nather@astro.AS.UTEXAS.EDU