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Path: utzoo!mnetor!uunet!husc6!hao!oddjob!gargoyle!ihnp4!drutx!qwerty
From: qwerty@drutx.ATT.COM (Brian Jones)
Newsgroups: comp.unix.wizards,comp.arch
Subject: Re: Double-bit errors and ECC memory
Message-ID: <5330@drutx.ATT.COM>
Date: Thu, 17-Sep-87 09:37:19 EDT
Article-I.D.: drutx.5330
Posted: Thu Sep 17 09:37:19 1987
Date-Received: Sat, 19-Sep-87 14:56:04 EDT
References: <1184@itm.UUCP> <797@spar.SPAR.SLB.COM> <2891@phri.UUCP>, <8587@utzoo.UUCP>
Organization: AT&T, Denver
Lines: 10
Summary: DEDSEC available in commercial chip set
Xref: mnetor comp.unix.wizards:4300 comp.arch:2219

In article <8587@utzoo.UUCP>, henry@utzoo.UUCP (Henry Spencer) writes:
> Clearly, what we need, urgently, is ECC on the damn memory chips.  There
> have already been mutterings about this, but no commercial products as
> far as I know.                               ^^^^^^^^^^^^^^^^^^^^^^

Intel has the 8206/8207 chip set for dual port DRAM control with DEDSEC
(dual error detection, single error correction).
-- 

Brian Jones  aka  {ihnp4,allegra}!{drutx}!qwerty  @  AT&T-IS, Denver