Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!utgpu!water!watmath!clyde!rutgers!mit-eddie!uw-beaver!ssc-vax!savage From: savage@ssc-vax.UUCP Newsgroups: comp.lsi Subject: Re: VHDL (Running under 4.2BSD) Message-ID: <1429@ssc-vax.UUCP> Date: Thu, 17-Sep-87 18:12:17 EDT Article-I.D.: ssc-vax.1429 Posted: Thu Sep 17 18:12:17 1987 Date-Received: Sat, 19-Sep-87 15:52:51 EDT Organization: Boeing Aerospace Corp., Seattle WA Lines: 57 Background (for those other who read this): VHDL stands for "VHSIC Hardware Description Language". (VHSIC stands for "Very High Speed Integrated Circuit" and is the name of a Department of Defense (DoD) program to improve the technology of electronic systems.) A hardware description language (HDL) is something akin to a programming language which has a model of the world that makes is easy to describe the behavior and structure of electronic hardware. Usually, HDLs are loosely based on programming languages--VHDL is based on Ada. First question: which VHDL? There is VHDL, version 7.2 developed by Intermetrics under contract from the DoD, and there is the IEEE draft standard of VHDL (which will probably become official in 12/87). The two are incompatible (just in case you hadn't figured that out :-). Currently, the only VHDL software available is the Intermetrics software developed under the above-mentioned contract (we have two installations here in Boeing), and a few other software programs which add other capabilities to the Intermetrics software. The software consists of a VHDL Analyzer (roughly equivalent to the first pass of a compiler), a Model Generator (roughly equivalent to the code-generation pass of a compiler), a VHDL simulation generator (r.e. to a link-editor), a Simplifier (which flattens a design for "more efficient simulation"), and a Design Library Manager (to keep track of all the intermediate files that all of the above programs generate and use). The Model Generator actually generates Ada source code and compiles it using the DEC Ada compiler and the simulation generator just links it with a simulation kernel that has already been compiled. This is probably the software referred to by John Lawitzke as available from the US Army LABCOM. (You can also get it directly from Intermetrics--if you really want to pay the big bucks. Of course, if you don't, you still have to figure out how to use it--see the discussion on corporate contributions to educational institutions in comp.edu for some interesting perspectives.) Intermetrics now has another contract to help develop a UNIX version of this software for the Canadian Armed Forces and to develop a set of tools to support the IEEE standard. The first installment--for a subset of the IEEE language--is supposed to come out at the end of this month (I think). The nice news (especially for John) is that the code generated is in C (not Ada! and yes, this is a DoD contract), so it should work pretty well with your standard C compiler. It will probably still require VMS (:-( ), but that should also pass. Next year, there will be several companies out with VHDL simulators. I would tell you who and when, but the people I have talked to have asked me to keep the info in my company. Would it be appropriate for someone from the companies involved to put out a message on the net saying: "We will have a VHDL simulator. Call X. Xson at (###)###-#### for more info."? That shouldn't cross the line between public service and commercialization, but then I'm not a lawyer.... Whew! I didn't think it would get that long--hope it helps. I'm still trying to get my company to have the right opinion, so obviously, I only speak for myself. Lowell Savage uw-beaver!ssc-vax!savage (206) 773-1996