Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!uunet!husc6!hao!oddjob!mimsy!umd5!hans From: hans@umd5.umd.edu (Hans Breitenlohner) Newsgroups: comp.sys.atari.8bit Subject: Re: 1200xl and the cpu and OSe Message-ID: <1935@umd5.umd.edu> Date: Tue, 15-Sep-87 18:55:37 EDT Article-I.D.: umd5.1935 Posted: Tue Sep 15 18:55:37 1987 Date-Received: Thu, 17-Sep-87 06:30:42 EDT References: <870907174221.284781@DOCKMASTER.ARPA> Reply-To: hans@umd5 (Hans Breitenlohner) Organization: University of Maryland, College Park Lines: 25 The XL and XE systems, as well as some 400s (maybe all), have a 6502C cpu chip. Its main distinction is the fact that it can tri-state the address bus, a feature which none of the standard 6500 family chips have. I recall reading that there is a chip in the 65c00 family which does have the tri-state feature (maybe 65c11), but have no information as to whether its pinout is compatible with the Atari chip. Being somewhat non-standard, it might also be considerably more expensive or harder to find. As far as I know there are no programming differences between the 6502 and the 6502c. As far as souping up the XL with a faster cpu, I have two concerns: 1. coordinating a faster cpu and the standard Antic might be quite a challenge. You would need memory which can run at slow and fast cycle rate, depending on who is talking to it. And while there is a fair amount of slack in memory timing with the current design, a significant speedup might cause much difficulty. 2. The i/o bandwidth is about 1920 bytes/second, and unless you main goal is to compute prime numbers, or do Mandelbrot pictures, any speedup is likely to make the i/o restrictions seem even more painful. Of course you might have disks on an MIO or similar device, but then you need to re-visit the first point I made.