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From: ccplumb@watmath.waterloo.edu (Colin Plumb)
Newsgroups: comp.arch
Subject: Re: What should be in hardware but isn't
Message-ID: <14750@watmath.waterloo.edu>
Date: Thu, 24-Sep-87 01:48:57 EDT
Article-I.D.: watmath.14750
Posted: Thu Sep 24 01:48:57 1987
Date-Received: Sat, 26-Sep-87 18:23:22 EDT
References: <581@l.cc.purdue.edu> <18336@amdcad.AMD.COM> <582@l.cc.purdue.edu>
Reply-To: ccplumb@watmath.waterloo.edu (Colin Plumb)
Organization: U. of Waterloo, Ontario
Lines: 18

In article <582@l.cc.purdue.edu> cik@l.cc.purdue.edu (Herman Rubin) writes:
>BTW, there is an address modification procedure which is missing on all
>machines I have seen except the UNIVAC's.  That is to consider the register
>file as a memory block and allow indexing on it.  Another missing procedure
>is to enable the register file to be treated as a block of memory so that
>bytes or short words can be addressed.  These two operations can be combined
>on a byte-addressable machine.

The PDP-10 also did this.  The first 16 memory locations were the registers.
There was an option to get fast (non-core) memory for these few bits.
(I think this is interesting, since these days you'd implement the registers
on-chip (on the CPU board, at least), and handle memory accesses to them as
a special case.)

	-Colin (ccplumb@watmath)

P.S. No, I'm not that old - I just read the manual today, thinking I should
know about the first (as far as I know) machine to have a register file.