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From: radford@calgary.UUCP (Radford Neal)
Newsgroups: comp.arch
Subject: Re: Demand paged virtual memory (was Re: Free Software Foundation ...)
Message-ID: <1082@vaxb.calgary.UUCP>
Date: Wed, 30-Sep-87 17:06:27 EDT
Article-I.D.: vaxb.1082
Posted: Wed Sep 30 17:06:27 1987
Date-Received: Sat, 10-Oct-87 18:48:29 EDT
References: <8490@think.UUCP> <1745@ncr-sd.SanDiego.NCR.COM> <819@sugar.UUCP> <4558@oberon.USC.EDU>
Organization: U. of Calgary, Calgary, Ab.
Lines: 14

In article <4558@oberon.USC.EDU>, blarson@skat.usc.edu (Bob Larson) writes:
> ... If there is strict control of code generation, it is even possible to
> imagine a demand page virtual memory system that does not need either.
> (Preceed each memory reference instruction by an address validity
> check instruction -- I assume this would be used on a RISC processor if
> anywhere.)

I've seen the equivalent of this in a 68000 C compiler. The procedure
entry prologue did an otherwise unnecessary memory reference, apparently
so that a stack-expansion address error would occur in a well-defined
context that the kernel knew how to restart from.

   Radford Neal
   The University of Calgary