Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!uunet!husc6!mit-eddie!ll-xn!ames!ucbcad!ucbvax!dewey.soe.berkeley.edu!oster From: oster@dewey.soe.berkeley.edu (David Phillip Oster) Newsgroups: comp.arch Subject: Re: Demand paged virtual memory (was Re: Free Software Foundation ...) Message-ID: <21207@ucbvax.BERKELEY.EDU> Date: Thu, 8-Oct-87 15:45:11 EDT Article-I.D.: ucbvax.21207 Posted: Thu Oct 8 15:45:11 1987 Date-Received: Sun, 11-Oct-87 09:18:41 EDT References: <8490@think.UUCP> <1745@ncr-sd.SanDiego.NCR.COM> <819@sugar.UUCP> <4558@oberon.USC.EDU> <1082@vaxb.calgary.UUCP> Sender: usenet@ucbvax.BERKELEY.EDU Reply-To: oster@dewey.soe.berkeley.edu.UUCP (David Phillip Oster) Organization: School of Education, UC-Berkeley Lines: 62 In article <1082@vaxb.calgary.UUCP> radford@calgary.UUCP (Radford Neal) writes: >In article <4558@oberon.USC.EDU>, blarson@skat.usc.edu (Bob Larson) writes: >> ... If there is strict control of code generation, it is even possible to >> imagine a demand page virtual memory system that does not need either. >> (Preceed each memory reference instruction by an address validity >> check instruction ) >I've seen the equivalent of this in a 68000 C compiler. The procedure >entry prologue did an otherwise unnecessary memory reference, apparently >so that a stack-expansion address error would occur in a well-defined >context that the kernel knew how to restart from. Apple's Lisa Office System used this technique. They had a 68000 in the Lisa and a small amount of extra hardware that compared the address on the address bus against upper-bound and lower-bound values. Out of bounds addresses generated an interrupt. The hardware actually supported 4 pairs of bounds, and these were mapped as stack, instruction space, data space, i/o space. This allowed the stack to grow to bigger than main memory (swapping stack pages to disk as needed, protected processes against each other (and protected the O.S.) It did slightly increase the context switch time though (the 8 limit registers were part of the process context.) Since Apple controlled the compilers for the machine, it was no problem to have them generate position independent code, with consistant stack frames. To swap out a code segment, just swap it out and patch the stack. (You can patch the stack because the compiler has left hints in the stack frames.) When you need to swap it back in, the patched stack "returns" to a handler that reads the segment into a new location, and fixes up the stack to point to where the code is now. The data is harder to move around, but with the compiler putting enough hints into the segment header, even this can be made to work. On top of this layer, it had a hierarchical file system, all applications were written in a Pascal-with-object-oriented-extensions, and it supported multiple applications, each with multiple windows, all running concurrently. with cut and paste of structured data between applications. Kind of like a modern macintosh+multifinder system but more integrated and with virtual memory too. Very sophisticated for a company who's previous products had all been 6502 based. I was a certified developer at the time. It was slower than other ways of using those parts, but incredibly easier to use (hence made better use of people's time) than anything in its price class at the time. I believe it failed becuase of poor marketing to corporations, and the fact that third party developers couldn't get their hands on the documentation for the class hierarchy used by Clascal, so it was impossible to add new applications that were integrated into the system. They copied the Xerox Star too well. To use most third party software, you had to reboot the machine under a different operating system. (Even the development environment ran on the same hardware unde a different, less spiffy, operating system.) Burroughs mainframes use a similar technique. It is kind of RISCy: Their computations showed that it was more effiecient to use their silicon real estate to have hardware support for a segment based architecture, with bounds checking, position independence, and tagged data and do the stack patching I've just described in software then it would have been to do virtual address translation in hardware and all the rest in hardware.