Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!uunet!husc6!mit-eddie!ll-xn!ames!sdcsvax!ucbvax!decvax!decwrl!pyramid!prls!mips!mark From: mark@mips.UUCP (Mark G. Johnson) Newsgroups: comp.lsi Subject: Re: Soft Error rates in dynamic RAM Message-ID: <709@obiwan.UUCP> Date: Fri, 25-Sep-87 11:50:02 EDT Article-I.D.: obiwan.709 Posted: Fri Sep 25 11:50:02 1987 Date-Received: Sun, 27-Sep-87 05:44:46 EDT Lines: 22 Keywords: IEDM In article <1309@leo.UUCP>, larry@leo.UUCP (Larry Johnson) writes > I am in the process of designing a DRAM for a chip set and > need to determine the soft error rate. The data I can't seem > to get my hands on is the alpha particle flux rate caused by > the package lid and the metal traces on the wafer. > Does anyone out there have typical numbers for this, and does > anyone have any good reference papers they could recommend. > Better still, did any of you write a paper on SER? The best single source is the proceedings of the IEEE International Electron Devices Meetings ("IEDM"). I strongly recommend this paper: Dennis Segers et al., "Circuit Design Methodologies for the Reduction of Alpha Soft Error Rate", IEDM Technical Digest, December 1983, pp. 331-5. as it covers design and test issues for modern (i.e. VCC/2 bitline) dRAMs. -- -Mark Johnson *** DISCLAIMER: The opinions above are personal. *** UUCP: {decvax,ucbvax,ihnp4}!decwrl!mips!mark TEL: 408-720-1700 x208 US mail: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086