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From: jimm@mitsumi.UUCP
Newsgroups: comp.sys.amiga
Subject: Re: Sprites
Message-ID: <382@mitsumi.UUCP>
Date: Thu, 1-Oct-87 17:01:10 EDT
Article-I.D.: mitsumi.382
Posted: Thu Oct  1 17:01:10 1987
Date-Received: Sat, 3-Oct-87 10:15:15 EDT
References: <1758@crash.CTS.COM> <1659@gryphon.CTS.COM> <4034@well.UUCP> <1686@gryphon.CTS.COM> <4094@well.UUCP>
Reply-To: jimm@mitsumi.UUCP (James Mackraz)
Organization: Mitsumi Technology Inc
Lines: 22

In article <4094@well.UUCP> ewhac@well.UUCP (Leo 'Bols Ewhac' Schwab) writes:
)
)	Sigh.  My information came from the mystic DMA timing chart that
)everyone says isn't in the A/W Hardware manual but really is.  There's a
)notation saying that a hardware stop is at cycle $18.
)
)	Well that's what it said.....
)Leo L. Schwab -- The Guy in The Cape

Perhaps there is not enough time for system horizontal blank processing
to run on the right; that is, perhaps the problem wraps around from the
right somehow.

Or, perhaps the timing spec (my personal favorite diagram) is wrong, or
the chip is broken.

Eat your eggs, Leo.
	jimm
-- 
	Jim Mackraz
	Mitsumi Technology, Inc.		408/980-5422
	{amiga,pyramid}!mitsumi!jimm