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From: perkins@bnrmtv.UUCP
Newsgroups: comp.sys.ibm.pc
Subject: Re: Nop
Message-ID: <2696@bnrmtv.UUCP>
Date: Fri, 2-Oct-87 17:47:38 EDT
Article-I.D.: bnrmtv.2696
Posted: Fri Oct  2 17:47:38 1987
Date-Received: Sun, 4-Oct-87 01:34:08 EDT
References: <539@cernvax.UUCP>
Organization: BNR Inc., Mountain View, California
Lines: 17
Keywords: NOP, pre-fetch
Summary: Instruction pre-fetch doesn't slow down the CPU.

In article <539@cernvax.UUCP>, carsten@cernvax.UUCP (carsten) writes:
> Even if the NOP is not executed, it has to be loaded into the instruction
> register (the CPU's cannot foresee the NOP (yet))! Hence it slows down
> the CPU!

Nope.  Instruction pre-fetch operates at least as fast (2 bus
cycles per byte -- one each for segment and offset) as instruction
execution.  The only penalty occurs on the first instruction after
a branch: that instruction has to be fetched before it can be
executed.  (There are actually some exceptions, such as when a
co-processor hogs the bus and prevents the Bus Interface Unit from
fetching instructions, but these are rare.)
-- 
{hplabs,amdahl,ames}!bnrmtv!perkins         --Henry Perkins

It is better never to have been born.  But who among us has such luck?
One in a million, perhaps.