Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!utgpu!water!watmath!clyde!rutgers!cbmvax!daveh From: daveh@cbmvax.UUCP Newsgroups: comp.sys.atari.st,comp.sys.misc,comp.sys.amiga Subject: Re: Atari Transputers ? & A British ST/Amiga Rival ? Message-ID: <2452@cbmvax.UUCP> Date: Fri, 2-Oct-87 12:05:35 EDT Article-I.D.: cbmvax.2452 Posted: Fri Oct 2 12:05:35 1987 Date-Received: Sat, 3-Oct-87 09:53:56 EDT References: <1138@water.waterloo.edu> Distribution: world Organization: Commodore Technology, West Chester, PA Lines: 59 Xref: utgpu comp.sys.atari.st:5062 comp.sys.misc:811 comp.sys.amiga:8404 in article <1138@water.waterloo.edu>, ljdickey@water.waterloo.edu (Lee Dickey) says: > Xref: cbmvax comp.sys.atari.st:5283 comp.sys.misc:879 comp.sys.amiga:8794 > > In article <607@sbcs.UUCP> root@sbcs.UUCP (Root) writes: >>> > One article I have seen quotes the performance of the slower T414 >>> > processor (20 mhz) as 10 MIPS ! >> >> RISC mips, unfortunately. > > You seem to imply that RISC mips are not quite as good as some other kind > of MIPS. Are RISC mips slower somehow? Are more instructions needed to > produce the same results? Explain, please. MIPS -> Million Instructions Per Second. Sounds clear, right? Think again. The problem is that EVERY CPU known to man has some differences in instruction size, efficiency, etc. Look at the 6502 for instance. Been around for years, 8 bit processor with mainly 8 bit registers, without question the most popular CPU for cheap home computers (Apple II line and Commodore PET, VIC, and C64/C128 lines all use varients of this). Know what? Run one of these suckers at 4MHz, and you've got yourself a sustained 1 MIP machine, with a peak MIP rating of 2 MIPS. See, the average 6502 instruction completes in 4 clock cycles, some complete in as little as 2 cycles. I guess a VAX 11/780 gives you around 1 MIPS sustained, as well, but you're certainly not going to fall for the contention that a 4MHz 6502 is faster in any way than a VAX 11/780. Now, I bet you're saying, hold on a minute, you can't compare the two, a 6502 is only an 8 bit processor, and a VAX is a 32 bit processor. Well, that's true, but there's more to it than just that. The 6502 doesn't have an instruction for 16 or 32 bit adds, so if I want to add these sized numbers, I must use a subprogram. The VAX does it in one instruction. Same with a multiply instruction, or several other things that can happen. To put it plainly, the VAX gets a heck of alot more work done in any single instruction than a 6502. Now enter RISC. No one can tell you what RISC is, but they can tell you some of the concepts of RISC. Like "one instruction per cycle", "lots of internal registers", "hard-coded vs. microcoded instructions set", "simple design so we can use fast technologies that aren't sophisticated enough for CISC designs", "LOAD/STORE only get to access memory", etc. Most RISC processors (Berkeley, MIPS, SPARC, HP, ARM, Transputer, You-Name-It) use some of these ideas. Most of them run faster than comparable CISC processors, and most have simpler instructions. So they, like the 6502, get less work done in a single instruction than comparable CISC processors. Even different CISC processors running the same memory speed get different amounts of work done per instruction. What this all means is that "MIPS" is an unreliable rating, unless its somehow standardized. One way that's being used more and more is comparable MIPS. For instance, RISC Processor A delivers a peak of 20 MIPS, sustained of 5 VAX 11/780 MIPS. > L. J. Dickey, Faculty of Mathematics, University of Waterloo. > ljdickey@watmath.UUCP UUCP: ...!uunet!watmath!ljdickey > ljdickey%water@waterloo.edu ljdickey@watdcs.BITNET > ljdickey%water%waterloo.csnet@csnet-relay.ARPA -- Dave Haynie Commodore-Amiga Usenet: {ihnp4|caip|rutgers}!cbmvax!daveh "The B2000 Guy" PLINK : D-DAVE H BIX : hazy "Computers are what happen when you give up sleeping" - Iggy the Cat