Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!utgpu!water!watmath!clyde!rutgers!rochester!udel!burdvax!sdcrdcf!trwrb!sansom From: sansom@trwrb.UUCP Newsgroups: comp.sys.atari.st,comp.sys.misc,comp.sys.amiga Subject: Re: Atari Transputers ? & A British ST/Amiga Rival ? Message-ID: <2935@trwrb.UUCP> Date: Fri, 2-Oct-87 15:51:36 EDT Article-I.D.: trwrb.2935 Posted: Fri Oct 2 15:51:36 1987 Date-Received: Sun, 4-Oct-87 01:22:43 EDT References: <8709181728.AA13664@ucbvax.Berkeley.EDU> <1623@gryphon.CTS.COM> <607@sbcs.UUCP> <1138@water.waterloo.edu> Reply-To: sansom@trwrb.UUCP (Richard Sansom) Distribution: world Organization: TRW SDS, Redondo Beach, CA Lines: 28 Xref: utgpu comp.sys.atari.st:5074 comp.sys.misc:817 comp.sys.amiga:8426 In article <1138@water.waterloo.edu> ljdickey@water.waterloo.edu (Lee Dickey) writes: >In article <607@sbcs.UUCP> root@sbcs.UUCP (Root) writes: >>> > One article I have seen quotes the performance of the slower T414 >>> > processor (20 mhz) as 10 MIPS ! >> >> RISC mips, unfortunately. > >You seem to imply that RISC mips are not quite as good as some other kind >of MIPS. Are RISC mips slower somehow? Are more instructions needed to >produce the same results? Explain, please. RISC is an acronym for "Reduced Instruction Set Computer". This implies that the computer will take more instructions to accomplish a task which may take only one instruction on a computer with an "enhanced" instruction set (such as the 68000). This may be true, but the RISC computer may still be faster since the amount of time each instruction takes is less (or _much_ less) than the amount of time an instruction takes on an enhaced instruction set computer. Does that help any? -Rich -- /////////////////////////////////////\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\ /// Richard E. Sansom TRW Electronics & Defense Sector \\\ \\\ {decvax,ucbvax,ihnp4}!trwrb!sansom Redondo Beach, CA /// \\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\\/////////////////////////////////////