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Path: utzoo!mnetor!uunet!husc6!mit-eddie!ll-xn!ames!ptsfa!ihnp4!ihlpm!snafu
From: snafu@ihlpm.ATT.COM (Wallis)
Newsgroups: comp.unix.questions
Subject: Re: Using subdirectories from make
Message-ID: <1413@ihlpm.ATT.COM>
Date: Fri, 25-Sep-87 09:31:05 EDT
Article-I.D.: ihlpm.1413
Posted: Fri Sep 25 09:31:05 1987
Date-Received: Sun, 27-Sep-87 01:50:56 EDT
References: <831@ektools.UUCP> <204@tut.cis.ohio-state.edu>
Organization: AT&T Network Systems, Inc., Naperville Il.
Lines: 87
Summary: Makefiles and alternate directories

In article <204@tut.cis.ohio-state.edu>, mdf@tut.cis.ohio-state.edu (Mark D. Freeman) writes:
> In <831@ektools.UUCP> jim@ektools.UUCP (James Hugh Moore) writes:
> >Basically, he has asked me if
> >there is a way of keeping source in one directory and objects in another and
> >using one makefile.  
> 
> >we would like to specify paths from a common directory, and have different
> >directories for source, objects, special testing software, etc.
> 
> I am in need of similar advice.  I want:
> 
> /foo = sources
> /foo/reg = objects
> /foo/special = objects created with certain #defines the regular ones
> 		don't have.
> 
> just doesn't hack it.   Yes, I'm doing some things under MSDOS...

On UNIX, the following should work. I'll base the example on the following
directory structure (which I think is a little more common than the one
above.

			proj
                        ||||
     ------------------- || --------------
     |            -------||------        |
     |            |             |        |
    bin        include         obj      src

Also, assume theat the makefile is in the 'src' directory.
----
# BASE == the root directory of the project
BASE = ..

SOURCE_DIR = $(BASE)/src
INC_DIR = $(BASE)/include
OBJ_DIR = $(BASE)/obj
BIN_DIR = $(BASE)/bin

PRODUCT = foobar

CFLAGS = -c -I$(INC_DIR)
LDFLAGS = -s
SPEC_DEFS = -DJUNK=boffo

OBJ_FILES = $(OBJ_DIR)/foo.o \
            $(OBJ_DIR)/bar.o

$(PRODUCT): $(OBJ_FILES)
		$(CC) $(LDFLAGS) -o $(PRODUCT) $(OBJ_FILES)

$(OBJ_DIR)/foo.o: $(SRC_DIR)/foo.c $(INC_DIR)/hdr.h
		$(CC) $(CFLAGS) $(SRC_DIR)/bar.c

$(OBJ_DIR)/bar.o: $(SRC_DIR)/bar.c $(INC_DIR)/hdr.h
		$(CC) $(CFLAGS) $(SPEC_DEFS) $(SRC_DIR)/bar.c
-----
Whether or not these types of constructs work under MS-DOS depends
on whose 'make' command you are using. I have one version of make
that is almost totally compatible with unix make, and another that
would not handle this at all.

Note that the same techniques used above can be used with multiple
source or object directories. If you need to be able to build multiple
versions of a particular object with different #defines, try the following:

$(OBJ_DIR_A)/foo.o: $(SRC_DIR)/foo.c $(INC_DIR)/hdr.h
		$(CC) $(CFLAGS) $(SPEC_DEFS_1) $(SRC_DIR)/bar.c

$(OBJ_DIR_B)/foo.o: $(SRC_DIR)/foo.c $(INC_DIR)/hdr.h
		$(CC) $(CFLAGS) $(SPEC_DEFS_2) $(SRC_DIR)/bar.c

$(PRODUCT_1): $(OBJ_FILES_1)
		$(CC) $(LDFLAGS) -o $(PRODUCT_1) $(OBJ_FILES_1)

$(PRODUCT_2): $(OBJ_FILES_2)
		$(CC) $(LDFLAGS) -o $(PRODUCT_2) $(OBJ_FILES_2)

Hope this helps. Let me kow if I confused you more than ever!




                              Dave Wallis
                           ihnp4!ihlpm!snafu
                       AT&T Network Systems, Inc.
                            (312) 510-6238