Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!uunet!husc6!bbn!rochester!PT.CS.CMU.EDU!K.GP.CS.CMU.EDU!lindsay From: lindsay@K.GP.CS.CMU.EDU (Donald Lindsay) Newsgroups: comp.arch Subject: Re: register windows Message-ID: <199@PT.CS.CMU.EDU> Date: Sun, 18-Oct-87 19:38:13 EDT Article-I.D.: PT.199 Posted: Sun Oct 18 19:38:13 1987 Date-Received: Mon, 19-Oct-87 02:00:19 EDT Sender: netnews@PT.CS.CMU.EDU Organization: Carnegie-Mellon University, CS/RI Lines: 31 Keywords: register windows References: It occurs to me that register-window machines tend to remember data which a cache would (correctly) overwrite. For example, assume that a program is half a dozen calls deep. What is the average amount of execution before the bottom (oldest) window is uncovered ? A reasonable answer: more than the average amount of execution between system calls, or more than the average amount of execution between interrupts, or more than the average amount of execution between task switches, or all of the above. If this dead weight is sent to memory more than once (by the inevitible second system call, or second interrupt) then considerable traffic could occur. This leads to the idea that a register-window machine should spill its elderly data to memory, perhaps at the first interrupt, perhaps at the first system call, or perhaps by a "trickle" mechanism. It shouldn't recall these values back from memory until some (much) later time - say, when their slot is returned-to (or when the one above them is returned-to) (or when return-from-interrupt notices that they are almost uncovered). It would be interesting to see simulation results on this. There is an excellent article in the September issue of (IEEE) Computer, by Flynn and others, which reports simulation results on various other register models. I consider the article flawed by its emphasis on counting memory traffic, while ignoring the topic of syscalls and interrupts. If they would factor these in, then the ideas presented above could be tested. Yes, I know that interrupt frequency is system-dependant (and so on). My point remains. Our understanding of register issues still needs work. -- Don lindsay@k.gp.cs.cmu.edu CMU Computer Science