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Path: utzoo!yetti!geac!arnold
From: arnold@geac.UUCP
Newsgroups: comp.arch
Subject: RISC
Message-ID: <1656@geac.UUCP>
Date: Wed, 21-Oct-87 17:03:37 EDT
Article-I.D.: geac.1656
Posted: Wed Oct 21 17:03:37 1987
Date-Received: Sat, 24-Oct-87 11:56:42 EDT
Organization: GEAC Computers, Toronto, CANADA
Lines: 9
Keywords: RISC,array


I have been hearing a lot about this new Reduced Instruction Set C?
technology...well I understand that if you restrict yourself to a
small instruction set and run it fast you get faster compiled 
programs (I guessed this was the assumption). But I have been unable
to find out just what the hardware differance is (though I have
heard referance to arrays?(I think that was it)).
So could someone out there explain a bit?
		thanx