Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!uunet!seismo!sundc!pitstop!sun!amdcad!tim From: tim@amdcad.AMD.COM (Tim Olson) Newsgroups: comp.arch Subject: Re: register windows Message-ID: <18855@amdcad.AMD.COM> Date: Sun, 25-Oct-87 20:27:02 EST Article-I.D.: amdcad.18855 Posted: Sun Oct 25 20:27:02 1987 Date-Received: Tue, 27-Oct-87 05:53:13 EST References: <201@PT.CS.CMU.EDU> <933@cpocd2.UUCP> <821@mips.UUCP> <18843@amdcad.AMD.COM> <833@mips.UUCP> Reply-To: tim@amdcad.UUCP (Tim Olson) Organization: Advanced Micro Devices Lines: 52 Keywords: register windows, interrupt latency In article <833@mips.UUCP> hansen@mips.UUCP (Craig Hansen) writes: | Loads/stores to variables through global pointer register: 15.2% (Because of | use of the global pointer register, these references are single instructions, | all of which have non-zero offset values.) I would suspect that the Am29000 | statistics do not count these as non-zero offset values, though they are | more than half of all the references. You are correct; these were not counted. The statistics were gathered by looking (at "runtime") for explicit address calculations of load addresses. I don't really consider the use of the global pointer register to be an "non-zero offset" addressing mode, however. Because the lower 16 bits of the global pointer register are zero, the offset is really just a concatenation -- no "add" is performed. | Tim should also be careful, though, to realize that the tools and | compilers used to measure the architecture also influences the results. Certainly. | Unless you set out to design both the architecture and the compiler | concurrently, you won't be able to make good trade-offs between them. THE compiler? Which one? C? Pascal? FORTRAN? Ada? Common LISP? Smalltalk? Obviously you must design the architecture with a great deal of thought put into how the resources are to be used by software and what can be easily/cheaply performed in software vs hardware, but I disagree with your statement. MIPS certainly didn't write an entire Ada compiler before starting architectural design, but that in no way decreases the viability of Ada running on a MIPS machine. | It should also be noted, again, that the selection of programs used as | benchmarks will influence the results too. Making your architectural | trade-offs on the basis of Dhrystone, or even nroff, which is not very | representative of more modern C code, isn't very smart. Making architectural decisions based on *any* single program isn't very smart. You should examine a large body of code, looking at older, heavily-used programs as well as more "modern" code (output of C++ compilers, object-oriented programming). Discounting nroff is kind of silly, however; it happens to be a large, heavily-used utility. MIPS used it, along with other significant UNIX utilities, in early papers on the R2000 [Rowen, et al, VLSI Systems Design, March 1986], and continues to reference it in John Mashey's performance briefs. -- Tim Olson Advanced Micro Devices (tim@amdcad.amd.com)