Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!utgpu!water!watmath!clyde!rutgers!iuvax!pur-ee!uiucdcs!uxc.cso.uiuc.edu!ccvaxa!aglew From: aglew@ccvaxa.UUCP Newsgroups: comp.arch Subject: Re: register windows Message-ID: <28200058@ccvaxa> Date: Tue, 27-Oct-87 21:19:00 EST Article-I.D.: ccvaxa.28200058 Posted: Tue Oct 27 21:19:00 1987 Date-Received: Sat, 31-Oct-87 01:42:49 EST References: <201@PT.CS.CMU.EDU> Lines: 15 Nf-ID: #R:PT.CS.CMU.EDU:201:ccvaxa:28200058:000:783 Nf-From: ccvaxa.UUCP!aglew Oct 27 20:19:00 1987 ..> Tim Olson posts comparisons of load/stores, and load/stores ..> with non-zero offsets, for MIPS (lots of indexing) and AMD29K (little). How do you count load/stores with non-zero offsets for the AMD29000, seeing as it has no such addressing mode? Was this for a design alternative, that did have indexing? Or do you count by looking at the number of loads that have an add immediately preceding to the register used in the address of the load/store? Variations of this last method would seem to me to be very susceptible to masking by code rearrangement in the optimizer. A while back I posted static counts of address constants on VAX 4.2 BSD. As I remember it, about 40% were for locals (stack offsets), but 20% were for pointer+field_offset. How do you optimize those away?