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From: aglew@ccvaxa.UUCP
Newsgroups: comp.arch
Subject: Re: H/W Write Buffers, S/W Synchronizat
Message-ID: <28200062@ccvaxa>
Date: Fri, 30-Oct-87 17:24:00 EST
Article-I.D.: ccvaxa.28200062
Posted: Fri Oct 30 17:24:00 1987
Date-Received: Mon, 2-Nov-87 05:23:11 EST
References: <2280002@hpsal2.HP.COM>
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Nf-From: ccvaxa.UUCP!aglew    Oct 30 16:24:00 1987


/* Written  1:28 pm  Oct 26, 1987 by viggy@hpsal2.HP.COM in ccvaxa:comp.arch */
/* ---------- "H/W Write Buffers, S/W Synchronizat" ---------- */


    Hardware Write Buffers and Software Synchronization

I have been looking into a problem involving software synchronization
using shared variables in tightly coupled private cache multiprocessor
systems with hardware write buffers.

I would like to hear other people's experiences with the problem: should
an architecture allow the performance advantage of write buffers and
restrict the way software synchronizes?

Hardware write (store) buffers provide queueing to smooth out the total
instruction flow by allowing the execution unit to proceed in spite of
unpredictable delays caused by the storage unit (cache miss).  In a
shared memory, private cache (write back) multiprocessor system, a
write buffer can cause temporary staleness of data.  If such data is
being shared between processes that are executing on different processors,
as in the example below, there can be serious problems with inconsistencies,
or deadlocks.

             Master                              Slave

Create work;                           Consume work;
Block;                                 Completed++;
available++;                           if (completed < available)
if ((available - completed) > 1)           wakeup(master);
    sleep;                             else sleep;
else
    wakeup (slave);

In this example, synchronization is accomplished through modification of
shared variables 'available', and 'completed'.  Changes to these variables
are not instantaneously visible in the other processor modules.  This causes
caches to become temporarily stale, which causes the problem - both master
and slave go to sleep forever.

The question is not "how to synchronize with write buffers", but rather the
follwoing:

  1.  How much code already uses this?

  2.  Is it difficult to write software with such a restriction?, and

  3.  Would it be appropriate to force software writers to identify shared
      variables?

John Mashey, are you listening?

Viggy Mokkarala (hplabs!hpda!viggy)
(408)447-5983
19420 Homestead Road, Cupertino, CA 95014.
/* End of text from ccvaxa:comp.arch */