Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!uunet!seismo!sundc!pitstop!sun!amdcad!ames!ptsfa!ihnp4!inuxc!iuvax!pur-ee!uiucdcs!uxc.cso.uiuc.edu!ccvaxa!aglew From: aglew@ccvaxa.UUCP Newsgroups: comp.arch Subject: Re: register windows Message-ID: <28200063@ccvaxa> Date: Sat, 31-Oct-87 12:28:00 EST Article-I.D.: ccvaxa.28200063 Posted: Sat Oct 31 12:28:00 1987 Date-Received: Thu, 5-Nov-87 20:33:53 EST References: <201@PT.CS.CMU.EDU> Lines: 45 Nf-ID: #R:PT.CS.CMU.EDU:201:ccvaxa:28200063:000:2219 Nf-From: ccvaxa.UUCP!aglew Oct 31 11:28:00 1987 ..> Address constants, register windows, and indexed addressing modes ..> vs. AMD's non-indexed addressing for the AMD29000. Addressing modes have fascinated me for a while, and I must admit that I am overjoyed by AMD's indications that non-indexing is not too painful. Now, would no register windows + non-indexing be useful? Something else to consider here is a non-virtual machine. Remember base registers? Base registers were originally introduced so that programs could be relocated, before virtual memory - on relocation, just update the base registers, plus the pool of address constants that the base registers are loaded from (ever wonder why PL/1 had a BASED attribute?). This requires that the base register + rest of address addition be atomic, or at least that no relocation may occur between them. It is possible to do this without base register addressing modes, but that handicaps optimizing compilers. Usually, base register addressing is: BASE + REGISTER + OFFSET since people want to have the REGISTER OFFSET addressing mode. Three input adders, ugh. But if we can get away without indexing, you just have BASE + LITERAL BASE + REGISTER And, as I am fond of pointing out, you can use OR instead of ADD. Why would I want base register addressing in this age of virtual memory? Well, as you know, Crays aren't virtual... it might be nice to be able to introduce a high performance, non-virtual, addition to your product line. The biggest problem is keeping your compiler writer's dirty hands off the base registers, since you want to reserve them for the OS. Especially, you don't want them to use the base registers like an extended constant pool (grr..) Andy "Krazy" Glew. Gould CSD-Urbana. USEnet: ihnp4!uiucdcs!ccvaxa!aglew 1101 E. University, Urbana, IL 61801 ARPAnet: aglew@gswd-vms.arpa I always felt that disclaimers were silly and affected, but there are people who let themselves be affected by silly things, so: my opinions are my own, and not the opinions of my employer, or any other organisation with which I am affiliated. I indicate my employer only so that other people may account for any possible bias I may have towards my employer's products or systems.