Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!uunet!husc6!cmcl2!brl-adm!umd5!uvaarpa!virginia!uvacs!edison!toylnd!dca From: dca@toylnd.UUCP (David C. Albrecht) Newsgroups: comp.sys.amiga Subject: Re: Chip RAM Message-ID: <177@toylnd.UUCP> Date: Mon, 12-Oct-87 22:23:35 EDT Article-I.D.: toylnd.177 Posted: Mon Oct 12 22:23:35 1987 Date-Received: Thu, 15-Oct-87 23:44:23 EDT References: <1821@gryphon.CTS.COM> Organization: Dave & Anne in Charlottesville, VA Lines: 35 Keywords: 1/2 M, 1M, 4M, PAL's Summary: Ahem. > Here's another one of those stupid "A modest proposal" ideas. > > Make the area of main memory under control of the custom chips > (chip RAM) be under software control. > > How about making it software selectable ? > > If this is pysically impossible, put on your best Emily Lattela > voice and go "never minnnd". > Physically, it is not possible. Well, probably possible but not without a good deal of major nastiness that would hardly make it worth it. What makes CHIP vs. FAST memory attractive is that the two reside on a different bus so that they don't interfere. If the memory was to be switchable you would have to run the lines for both busses to some point where the memory could get to it and then tri-state back and forth to the appropriate set. The amount of board real estate required by this and/or expansion bus pins required would be sizable. We are talking about 22 address pins & 8 data pins and the logic for 30 some tri-state buffers plus selection logic. It would unquestionable increase the system cost and complexity with debatable benefit. Even if the physical aspects weren't tricky the software managment aspects would be. When does it get switched, who gets to switch it, how? If it was changeable by the task then two tasks with different needs could play tug-o-war on your chip ram. Once something was allocated into chip ram you couldn't then switch the size if it affected any allocated areas. Once something was allocated into fast ram you would have a similar problem but not nearly so nasty (considering the 500 & 2000 already have the half-fast problem). Having to reboot the system to change configurations would be quite unattractive. I think if it comes to that we are better off having the CHIP ram expandable by adding internal SIPs of ram on the motherboard and non-CHIP ram expandable in the usual expansion board fashion and you pays you money and you takes your choice. David Albrecht