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Path: utzoo!mnetor!uunet!ccicpg!harald
From: harald@ccicpg.UUCP ( Harald Milne)
Newsgroups: comp.sys.amiga
Subject: Re: Monitor mishmash
Message-ID: <3290@ccicpg.UUCP>
Date: Mon, 26-Oct-87 02:00:58 EST
Article-I.D.: ccicpg.3290
Posted: Mon Oct 26 02:00:58 1987
Date-Received: Wed, 28-Oct-87 00:51:58 EST
References: <3113@ccicpg.UUCP> <2530@cbmvax.UUCP> <1774@dino.cpe.ulowell.edu> <2595@cbmvax.UUCP>
Organization: CCI CPD, Irvine CA
Lines: 55
Keywords: Interlace, monitors, scan doublers

In article <2595@cbmvax.UUCP>, hedley@cbmvax.UUCP (Hedley Davis) writes:
> In article <3248@ccicpg.UUCP> harald@ccicpg.UUCP ( Harald Milne) writes:
> >In article <1774@dino.cpe.ulowell.edu>, miner@dino.cpe.ulowell.edu (Rich Miner) writes:
> >> In article <2530@cbmvax.UUCP> hedley@cbmvax.UUCP (Hedley Davis) writes:
> >> >Scan Converter:
> >> >	Not so cheap ( due to memory cost ).
> >
> >	I would dicker with the not cheap comment. Ever heard of interleave?
> >I also made this comment, until I realized that if you delay ram timings
> >through interleaving, You don't need fast rams.
> >
> I meant that it was not cheap relative to a scan doubler. 
> Yes I have heard of interleave.

	Sorry, I didn't know I was talking to a CBM engineer. This discussion
got quite threaded. Sorry Mr Davis.

> I think you need fast rams. If you can do it using low bandwidth rams
> ( IE normal DRAMS ( not video shift register rams )), for less cost
> than the neccesary number of video shift register rams, I am sure
> many people here as well as all the other computer companies would be
> very interested.

	I believe I have that solution using slow 256k drams. I don't care
about other companies, just the Amiga. The solution I have in mind only
pertains to the A2000.

> 
> Hedley
> 
> PS:	I'd be interested anyway. Maybe you'll show me a trick or
> too....

	According to my calculations, the pixel rate (the time that digital RGB
information has to arrive from ram) is not a factor. If it is, I have got that
covered anyway, and very simply, using 2 way interleave. The problem as I
understand it, is the need for dual port video rams. When displaying this
uninterlaced information, it is necessary to simulatuneously display from
the very same ram that is being written to. Thus the need for dual port rams.
By using additional buffering in extra cheap ram, this problem is solved along
with the need to use dual port drams. Thus a lower cost. This is of course 
at the expense of PC real estate, to have the extra cheap chips on a PC card.
I think that this solution also solves another problem, the timing of this
mess, address generation, etc.
	Also by my calcutations, the problem splits very neatly. I takes less
than 512k bytes of ram to store an entire Hi-res digital RGB encoded picture,
including max overscan. The cost for cheap 256k drams for 512k of memory is
less than $100.00. That's $200 for 2 stored deinterlaced frames of RGB. 
See what I am getting at?


-- 
Work: Computer Consoles Inc. (CCI), Advanced Development Group (ADG)
      Irvine, CA (RISCy business! Home of the CCI POWER 6/32)
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