Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!uunet!lll-winken!lll-lcc!pyramid!csg From: csg@pyramid.pyramid.com (Carl S. Gutekunst) Newsgroups: comp.arch Subject: Re: Horizontal pipelining Message-ID: <9398@pyramid.pyramid.com> Date: Mon, 2-Nov-87 20:04:29 EST Article-I.D.: pyramid.9398 Posted: Mon Nov 2 20:04:29 1987 Date-Received: Fri, 6-Nov-87 03:58:05 EST References: <201@PT.CS.CMU.EDU> <8801@utzoo.UUCP> <8758@shemp.UCLA.EDU> <2525@mmintl.UUCP> Reply-To: csg@pyramid.UUCP (Carl S. Gutekunst) Organization: Pyramid Technology Corp., Mountain View, CA Lines: 16 Keywords: multiple users In article <2525@mmintl.UUCP> franka@mmintl.UUCP (Frank Adams) writes: >Instead, why not have four different execution threads being performed >simultaneously? This eliminates the dependency checks and latency delays >inherent in "vertical" pipelining. The early UNIVAC 1100-series processors did this. The instruction fetch ro- tated among the four pipelines, and when there were no dependancy problems between threads it executed them simultaneously. There certainly were depen- dancy troubles; you could not have any thread manipulating the same operands as any other thread. I don't see how you could avoid this. The UNIVAC 1110 had four pipelines; the 1100/60 and 1100/80 have two. I don't think the 1100/90 has more than one. I don't know specifically why Sperry dropped the four-stage parallel pipeline, although I can guess: it was a lot of iron that was difficult to use effectively.