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From: dennisr@ncr-sd.SanDiego.NCR.COM (Dennis Russell)
Newsgroups: comp.arch
Subject: Re: Information Request: Sun's SPARC Chip
Message-ID: <1889@ncr-sd.SanDiego.NCR.COM>
Date: Sat, 14-Nov-87 14:42:10 EST
Article-I.D.: ncr-sd.1889
Posted: Sat Nov 14 14:42:10 1987
Date-Received: Sun, 15-Nov-87 18:43:19 EST
References: <6310001@hpcupt1.HP.COM> <2411@im4u.UUCP> <18203@amdahl.amdahl.com> <3084@psuvax1.psu.edu>
Reply-To: dennisr@ncr-sd.SanDiego.NCR.COM (0000-Dennis Russell)
Organization: NCR Corporation, Rancho Bernardo
Lines: 20
Keywords: RISC, SPARC
Summary: SPARC Implementations by Fujitsu, Cypress, and BIT

In article <18203@amdahl.amdahl.com> chuck@amdahl.amdahl.com (Charles Simmons) writes:
>> With such a small number
>>of gates, the SPARC chip should be implementable in ECL or GaAs, neh?
>>Hasn't Sun farmed out production of the SPARC chip to some chip maker
>>who will be building an ECL version of the chip? 
>

Fujitsu is implementing a gate array version of the SPARC.  The part number
is MB86900.  It runs at 16.67 MHz and is rated at 10 MIPS typ.

Cypress Semiconductor is implementing a custom version of SPARC in .8
Micron 2 layer Metal CMOS technology.  The part number is CY7C601.  It runs
at 25 MHz and is rated at 20 Equivalent VAX MIPS.

BIT (Bipolar Integrated Technology) is implementing a full custom ECL
version of SPARC employing their BIT1 bipolar technology.
-- 
Dennis Russell                               |        NCR Corp., M/S 4720
phone:    619-485-3214                       |        16550 W. Bernardo Dr.     
UUCP:  ...{ihnp4|pyramid}!ncr-sd!dennisr     |        San Diego, CA 92128