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Path: utzoo!henry
From: henry@utzoo.UUCP (Henry Spencer)
Newsgroups: comp.arch
Subject: Re: Information Request: Sun's SPARC Chip
Message-ID: <8961@utzoo.UUCP>
Date: Thu, 19-Nov-87 14:49:37 EST
Article-I.D.: utzoo.8961
Posted: Thu Nov 19 14:49:37 1987
Date-Received: Thu, 19-Nov-87 14:49:37 EST
References: <6310001@hpcupt1.HP.COM>
Organization: U of Toronto Zoology
Lines: 17
Keywords: RISC, SPARC

> I understand that the SPARC can execute 68000 code, in an emulation mode. At
> least Sun talks about the Sun-4 running Sun-3 stuff at 7 MIPS effective...

I would guess that they are talking about recompiling it first.  There is
no 68000 emulation in the SPARC architecture manual (not in the copy I saw,
anyway), and I would be awfully surprised to see Sun increase the complexity
of the cpu by an order of magnitude just for backward compatibility!  Mmm,
I suppose it's just conceivable that there's a 68020/68881 pair in some dark
corner of the Sun-4 CPU board, but that too would surprise me.  If they are
not talking about recompilation (or mechanical translation of the binary
into a SPARC binary, which might be practical), then it must be software
simulation and I'd be skeptical of the MIPS number.  You could probably make
a 68020 simulator for the SPARC that would run pretty nicely, but 7 MIPS is
a lot for that approach.
-- 
Those who do not understand Unix are |  Henry Spencer @ U of Toronto Zoology
condemned to reinvent it, poorly.    | {allegra,ihnp4,decvax,utai}!utzoo!henry