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From: bcase@apple.UUCP
Newsgroups: comp.arch
Subject: Re: Wirth's "challenge" (overflows)
Message-ID: <6777@apple.UUCP>
Date: Thu, 19-Nov-87 12:53:45 EST
Article-I.D.: apple.6777
Posted: Thu Nov 19 12:53:45 1987
Date-Received: Sat, 21-Nov-87 16:07:52 EST
References: <1656@geac.UUCP> <863@winchester.UUCP> <197@m2.mfci.UUCP> <902@mips.UUCP> <8933@utzoo.UUCP> <6743@apple.UUCP> <3440@ames.arpa>
Reply-To: bcase@apple.UUCP (Brian Case)
Organization: Apple Computer Inc., Cupertino, USA
Lines: 31
Keywords: integeroverflow

In article <3440@ames.arpa> lamaster@ames.UUCP (Hugh LaMaster) writes:
>Do the "trap" type instructions interact with a mask in the user context which
>sets which conditions will trap (one machine I know of allows users to specify
>their own routines for error handling of specific trapped errors); then, the
>user can turn error checking on for a specific process.  I understand that
>some "non-trap" type instructions are there to support certain kinds of
>unsigned arithmetic, but there is virtually no cost even on a completely
>hardwired machine for some kind of system and user programmable control
>registers to give the user options on a per-process basis.

We asked ourselves essentially this question during the early days of 29000
design.  No, there is no "trap on overflow" mode bit.

The "non-trap" type instructions are there to support computations that
you want to compute module 2^32; they were originally named "add modulo"
or something like that (my compiler spit out "addm").  There are two add
instructions that trap on overflow:  add-signed-and-trap, and add-unsigned-
and-trap (also add-with-carry-signed-and-trap and add-with-carry-unsigned-
and-trap).

As for the mode bit, we thought about it and discarded it as ugly.  The
same effect can be had by substituting the desired version of the add/sub
instructions for the ones that are actually in the code when the program
is loaded.  Wait, before flaming, I know this sounds silly, but it can be
done because all instructions are the same length (and have the same format
in this case), and, something to which I have recently become sensitive,
modes make simulation of architectures much more difficult (although the
big jump in difficulty comes as you go from zero modes to one).  We just
didn't think there was really any justification for a mode bit.  However,
we were wrong at least once, so we could have been wrong on this one.
Comments?  Feelings?  Experiences?