Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!uunet!husc6!rutgers!im4u!ut-sally!ghostwheel!milano!hi3.aca.mcc.com!unniks From: unniks@hi3.aca.mcc.com.UUCP (C. Unnikrishnan) Newsgroups: comp.arch Subject: Re: Systolic Arrays Message-ID: <270@hi3.aca.mcc.com.UUCP> Date: Thu, 19-Nov-87 02:31:49 EST Article-I.D.: hi3.270 Posted: Thu Nov 19 02:31:49 1987 Date-Received: Sat, 21-Nov-87 18:34:24 EST References: <8711180016.AA02055@decwrl.dec.com> Organization: MCC, Austin, TX Lines: 34 in article <8711180016.AA02055@decwrl.dec.com>, danielwong@zgov01.dec.com (Daniel Wong Su Chun (PDE/Test)) says: > > Has anyone heard of a commercially available systolic array type of > processor which is targetted for digital signal processing transformations > like FFTs, IFFTs, FWHTs etc. > Thanking everyone in advance. > yes, you are in luck. NCR makes what they call the gapp (geometric arithmetic parallel processor part no. ncr45cg72). it is a 2-d systolic array chip. it is mesh connected 6 x 12 1 bit processors. each element can communicate with four neighbours. n, s, e, w etc. it can be cascaded into arbitrary sizes in multiples of 6 x 12 elements. - cmos systolic array with 72 processors per chip - simd architecture - fully cascadeable - 128 bits of ram per processor - overlapped i/o and computation - broadcast global input and output etc. my colleague who is an ex-ncr says that ncr has stopped manufacturing these chips. dont know any more details. good luck unni ******************************************************************************* C. Unni Krishnan unni@mcc.COM ##Arpa Internet unniks%hulk@milano.UUCP {...,gatech,..}!ut-sally!im4u!milano!hulk!unniks ##UUCP *******************************************************************************