Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!uunet!portal!cup.portal.com!truett From: truett@cup.portal.com Newsgroups: comp.dcom.lans,comp.sys.ibm.pc Subject: Re: IBM PC/AT DMA loses (was Re: PC LAN Comparison) Message-ID: <1560@cup.portal.com> Date: Tue, 24-Nov-87 00:10:12 EST Article-I.D.: cup.1560 Posted: Tue Nov 24 00:10:12 1987 Date-Received: Fri, 27-Nov-87 06:04:30 EST References: <2070@killer.UUCP> <1020@kodak.UUCP> <155@tic.UUCP> <261@kaos.UUCP> <372@gethen.UUCP> Organization: The Portal System (TM) Lines: 16 Xref: mnetor comp.dcom.lans:963 comp.sys.ibm.pc:10464 XPortal-User-Id: 1.1001.2190 On the IBM bus, the DMA loses yet again! Remember that on that bus, the CPU unconditionally grants the bus to any DMA request (it almost has to, that's how the PC and XT do their dynamic memory refresh). Thus, several DMA devices can capture the bus and lock the CPU out. If PIO is used, though, the CPU has a choice. On a bus that allows a DMA request to be blocked by a higher priority compute task this problem probably does not occur. Also, note that the assumption that a CPU only needs the bus every n-th cycle is very dependent on the design of the particular system being considered. There are, I believe, processors out there that can do a fetch and an operation on every cycle. I know some DSPs do and some RISCs probably do, not to memtion highly pipelined microprocessors of more traditional type. Truett Smith, Sunnyvale, CA UUCP: truett@cup.portal.com