Relay-Version: version B 2.10 5/3/83; site utzoo.UUCP Path: utzoo!mnetor!uunet!cbmvax!daveh From: daveh@cbmvax.UUCP (Dave Haynie) Newsgroups: comp.sys.amiga Subject: Re: Commodore 68020 Message-ID: <2855@cbmvax.UUCP> Date: Tue, 24-Nov-87 16:26:50 EST Article-I.D.: cbmvax.2855 Posted: Tue Nov 24 16:26:50 1987 Date-Received: Sat, 28-Nov-87 04:18:51 EST References: <21922@ucbvax.BERKELEY.EDU> Distribution: na Organization: Commodore Technology, West Chester, PA Lines: 45 in article <21922@ucbvax.BERKELEY.EDU>, shs@ji.Berkeley.EDU (Steve Schoettler) says: >>It's a little more involved that that, Bosco! Anything that uses upper bits >>as tagged won't work on any 68020 system that does fully decoded addressing. >>So if my memory board is at, say, 0x01000000, it's not going to be at >>0x11000000 or 0x21000000, etc. if I'm fully decoding the 68020 addresses. > > It's exactly that involved, but you have to know something about the > implementation. The scenerio goes: > you fetch a 32 bit value. The upper 4 bits tell you whether it's > an integer, a pointer, a list, etc. > If it's a pointer, you MASK OFF the 4 bits (and.l #0ffffffff, d0) and > access that address. Right, in the context of an interpreter. I was thinking in terms of best speed, not best implementability, on a typical 68020 system. So I guess, if you do it that way, that any extra memory could just be ignored, instead of causing problems. However, if you've got the extra mask step, is using the tagged architecture really that much faster than calling each element two words instead of one, and storing the tags in the second word. Certainly this would eat memory at twice the rate, but the mask operation can't be much faster than the second fetch, can it? >>What you really want is the TI LISP chip on a coprocessor card. >> > What I really want is the Berkeley PLM (Prolog Logic Machine) chip > on a coprocessor card. OK. > By the way, why do you guys keep calling it a COprocessor card? Isn't it more > like an instead-of-the-main-processor card? :~) Well, the current implementation of our 68020 card is in fact an "instead of the main processor" card. There's no reason, however, why you could put the TI, PLM, or a 68020 in that slot and implement it as a real, "works in concert with the 68000" coprocessor type card, the "Coprocessor" slot facilitates this type of switching. >>Dave Haynie Commodore-Amiga Usenet: {ihnp4|caip|rutgers}!cbmvax!daveh > > Steve Schoettler -- Dave Haynie Commodore-Amiga Usenet: {ihnp4|caip|rutgers}!cbmvax!daveh "The B2000 Guy" PLINK : D-DAVE H BIX : hazy "I can't relax, 'cause I'm a Boinger!"