Path: utzoo!mnetor!uunet!seismo!sundc!pitstop!sun!quintus!pds From: pds@quintus.UUCP (Peter Schachte) Newsgroups: comp.arch Subject: Re: Wirth's challenge (was Re: RISC Message-ID: <489@cresswell.quintus.UUCP> Date: 22 Dec 87 17:57:14 GMT References: <6901@apple.UUCP> <28200075@ccvaxa> <12181@orchid.waterloo.edu> Organization: Quintus Computer Systems, Mountain View, CA Lines: 48 Summary: specialized chip features are ok In article <12181@orchid.waterloo.edu>, atbowler@orchid.waterloo.edu (Alan T. Bowler [SDG]) writes: > .... Once you get over > the fixation that your problem is so different that the hardware > designer has to tailor an instruction just for you, you realize > that what you want is something that does some basic functions > fast, and let the programmer construct the other stuff. The > design problem is to choose the right basic operations. That's the issue, alright. For symbolic languages, tagged pointer operations are very important. Typically, tagged dispatch and tagged pointer following are done quite a lot, and cutting the number of machine instructions to do these things can make quite a difference in performance. Take the example of following a tagged pointer. If the tag is kept in the high few bits of a 32 bit address, one must and the pointer with a 32 bit constant. Quite a lot of overhead, when a simple addressing mode that ignored the high, say, 4 bits of the address would do the trick perfectly. I know this runs contrary to the RISC ideal. But on a CISC, this is no more arcane than some of the other addressing modes. Similarly for tagged dispatch. If there were an instruction to take the top, say, 2 bits of a register, shift them right a whole bunch of places, add them to a given address, and jump to the address stored there. Sure, this could be done with a shift or rotate, an and, an add, and an indirect jump. But wouldn't you rather do one instruction than 4? These are some of the operations that would make Lisp and Prolog run faster. I'm sure each language, and each class of languages, has it's own favorite chip features. The important questions are: how much will a given feature speed up a given task? How much will it cost (in terms of $, speed of other operations, etc.)? And how important is that task? I imagine BCD probably wasn't worth it. Perhaps the features I've just asked for aren't worth it either. Maybe it would be better, on average, to have a scaled, post-incremented, memory indirect addressing mode (0.5 :-), 0.5 :-(). Or a 48 bit one's complement multiply instruction, or whatever. The point machine designers should take into account is that more and more, people are buying general-purpose hardware rather than the more expensive specialized hardware. Therefore, they should design their machines taking symbolic languages, CAD, and other specialized tasks into account. -- -Peter Schachte pds@quintus.uucp ...!sun!quintus!pds