Path: utzoo!mnetor!uunet!husc6!cca!mirror!ima!johnl
From: sundc!convex!wallach@seismo.CSS.GOV
Newsgroups: comp.compilers
Subject: Re: What is a scoreboard?
Message-ID: <828@ima.ISC.COM>
Date: 23 Dec 87 23:05:00 GMT
References: <797@ima.ISC.COM>
Sender: johnl@ima.ISC.COM
Reply-To: sundc!convex!wallach@seismo.CSS.GOV
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Approved: compilers@ima.UUCP
Nf-ID: #R:ima.ISC.COM:-79700:convex:70800001:000:1549
Nf-From: convex.UUCP!wallach    Dec 23 17:05:00 1987

/* Written  9:00 am  Dec 18, 1987 by johnl@ima.UUCP in convex:comp.compilers */
In article <797@ima.ISC.COM>, ...!harvard!talcott!motcoh!mark writes:
> Can someone explain the technique of using "scoreboards" in 
> compiler development?  Any references?

    I don't have any hard references, but when I ran into the CDC 6600
hardware it was described as having a hardware scoreboard.  With regard
to compilers, it comes up with some of the RISC designs, where the
compiler has to do instruction scheduling and branch delays.  I would
imagine that is where the term came from.

    A scoreboard keeps track of the various functional units of the
machine, and will not allow access to a unit, until it finishes.  For
example, if divide takes 8 clock units, a scoreboard would indicate that
the any reference within the 8 clock units to either the input and
result registers would pend instructions.  Even if the hardware provides
such a scoreboard, on such machines it is usually an advantage to have
the compiler know about these delays, so that it can try to do more
stuff in parallel.
--
Michael Meissner, Data General.		Uucp: ...!mcnc!rti!xyzzy!meissner
					Arpa/Csnet:  meissner@dg-rtp.DG.COM
--
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/* End of text from convex:comp.compilers */

--
Send compilers articles to ima!compilers or, in a pinch, to Levine@YALE.EDU
Plausible paths are { ihnp4 | decvax | cbosgd | harvard | yale | bbn}!ima
Please send responses to the originator of the message -- I cannot forward
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