Path: utzoo!utgpu!water!watmath!clyde!rutgers!rochester!ritcv!cci632!ccicpg!harald
From: harald@ccicpg.UUCP ( Harald Milne)
Newsgroups: comp.sys.amiga
Subject: Re: Still More 68020 Questions
Message-ID: <8822@ccicpg.UUCP>
Date: 10 Jan 88 11:24:53 GMT
References: <8801081459.AA16543@decwrl.dec.com>
Organization: CCI CPD, Irvine CA
Lines: 58

In article <8801081459.AA16543@decwrl.dec.com>, plouff@nac.dec.com (08-Jan-1988 0946) writes:
> For Commodore folks:  This month's _AmigaWorld_ has an article 
> about the CSA 68020 board for the A2000.  The performance numbers seem 
> disappointingly low, and some of the explanations a bit screwy.  Can 
> someone answer two simple questions?  The answers to these are not 
> obvious in my rather meager document set or from rereading the slush 
> pile of saved comp.sys.amiga articles.

	Well this has not been discussed at great length.

	I read this article, and was suprised to learn that the 68020
would run slower than the 68000.

	I got an answer from fellow engineers working with 68020 controllers.

	The 68020 works well with a 32 bit bus. The Amiga is 16. When the
68020 requests a 32 bit quanity like an address, it has to generate 2
address requests to retrieve this data. More time spent in bus transfers.

	Your are right, the answers are not obvious.

> 1.  When the operating system recognizes a 68020, what exactly does it 
> do?

	As far as I know, it adjusts for the difference in stack frames,
and you can query the CPU type.

> Is the '020 instruction cache turned on by ROM Kernel routines (or 
> elsewhere in the OS), or must the user run a separate program?

	Good question.

> 2.  Other than running self-modifying code, can one get in trouble 
> running with the cache enabled?

	Wow, I have not even considered cache coherency. What a HUGE can of
worms.	If memory is written to without the CPU's knowledge, then that 
"hit" in the cache is "dirty". For the 68020 this should not be a big deal.
Self modifying code? You want to do this? (Ive done this to an 8080 to get
to port addresses, but yucko!).

	Now if we were talking about the 68030, we would be getting into big
trouble, since the 68030 also caches data. The Amiga with all her coprocessors
writing into memory, could not garentee data is not "dirty" without bus
watching techniques (The same problem occurs in multi-processing environments).

	I guess that means the 68030 cache has gotta go! 8^(

	I was hoping to see cache expansion versus 32-bit memory solutions.
You know, like using the TI cache extension chip.

	Please! Somebody tell me I am wrong!


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