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From: bcase@apple.UUCP (Brian Case)
Newsgroups: comp.arch
Subject: Re: 68020 - Indirect Post-indexed
Message-ID: <7181@apple.UUCP>
Date: 13 Jan 88 19:17:53 GMT
References: <93900009@hcx2>
Reply-To: bcase@apple.UUCP (Brian Case)
Organization: Apple Computer Inc., Cupertino, USA
Lines: 33

In article <93900009@hcx2> daver@hcx2.SSD.HARRIS.COM writes:
>
>The MC68020 provides a Memory Indirect Post-indexed addressing mode.
>
>Referring to the 2nd edition of the User's Manual, the last paragraph of 
>page 2-10 indicates that "all four user-specified values are optional."
>Does this mean that an addressing mode (described on the next page) could
>be written as:    ([bd,An], , )    ?
>How would the extension word for this be encoded?  According to pages 2-19
>and 2-20, it would seem reasonable to set the Index Suppress (IS) bit to '1'
>and the Index/Indirect Selection (I/IS) bits to '101'.  But Table 2-2 says 
>that such a combination is 'Reserved.'
>
>Are all four user-specified values really optional?  What does the hardware
>do when it sees this particular reserved value?  (The preliminary version of
>the MC68030 User's Manual seems to say the same thing as the MC68020 manual
>in this area.)

Ah, yes!!  I have been through this before.  A related question is:  "How can
you specify indirection through a data register?  I.e., how does one encode
    MOVE  (Dn),Dn
???"

Well, using various combinations of supression, simple data register
indirection can be encoded on the 68020.

To answer your question, yes, all four user-specified values are optional!
So, to encode what you have written ([bd,An],,), you would set IS to 1 and
set I/IS to 001.  To encode the simple data register indirection, one would
set BS to 1, IS to 0, I/IS to 000, and BD SIZE to 01.  Then set D/A to 0,
REGISTER to the desired data register number, W/L to 1 (unless you want a
16-bit pointer), and SCALE to 00.  Don't ask me how many cycles these
stupid addressing modes take, I get nauseous at the thought.  Good luck 68040.