Path: utzoo!mnetor!uunet!seismo!sundc!pitstop!sun!decwrl!spar!malcolm
From: malcolm@spar.SPAR.SLB.COM (Malcolm Slaney)
Newsgroups: comp.arch
Subject: Intel 432's evolves into a RISC???
Message-ID: <243@spar.SPAR.SLB.COM>
Date: 12 Jan 88 00:38:42 GMT
Organization: SPAR - Schlumberger Palo Alto Research
Lines: 20


	Intel RISC Due in Spring; Details at ISSCC
	From EE Times (January 11, 1988, p 2).

	Hillsboro, OR - Intel Corp. will spring a single-chip embedded
	microcontroller that will be its first design to employ RISC
	techniques this spring.  The device is part of the 80900 family
	under development as part of the Gemini project here. ....
	.....
	The microcontroller design is based on the architecture of a three-
	chip set that includes the rumored P-7 microprocessor.  Gemini is
	a revival of the concepts of Intel's pioneering effort in redundant
	fault tolerant processing -- the iAPX 432 chip set,....

Let me get this right.....the absolute biggest of the CISC's (the 432) is 
evolving into a RISC?

Maybe EE Times left the :-) off the article.

							Malcolm