Path: utzoo!mnetor!uunet!husc6!cmcl2!nrl-cmf!ames!oliveb!intelca!mipos3!cpocd2!howard
From: howard@cpocd2.UUCP (Howard A. Landman)
Newsgroups: comp.arch
Subject: Re: Intel 432's evolves into a RISC???
Message-ID: <1071@cpocd2.UUCP>
Date: 19 Jan 88 22:42:02 GMT
References: <243@spar.SPAR.SLB.COM> <2707@omepd>
Reply-To: howard@cpocd2.UUCP (Howard A. Landman)
Organization: Intel Corp. ASIC Systems Organization, Chandler AZ
Lines: 23

In article <2707@omepd> mcg@omepd.UUCP (Steven McGeady) writes:
>Moreover, the comparisons, if made by object-oriented, fault-tolerant,
>CISC computer zealots, would refer to the advanced, pioneering,
>glimpse-of-the-future 432 processor, while comparisons made by the RISC,
>anti-Intel, and architectural purity zealots would refer to the abysmally
>slow and commercially unsuccessful 432.

I'm an object oriented, fault tolerant, RISC zealot who works for Intel.
Where does that leave me?  I personally remember the "abysmally slow" 432
better than the other ones you mentioned.  As far as I'm concerned, that
makes the 432 a bad architecture for object-oriented languages.

If anyone sees a photo of the chip, here's an easy way to tell RISC from CISC:
Identify the datapath and RAM (including register file and cache).  If they
add up to less than half the chip area, it's a CISC.  That's because the rest
is probably all control, and any chip that's more than half control does not
have a simple architecture.

-- 
	Howard A. Landman
	{oliveb,hplabs}!intelca!mipos3!cpocd2!howard
	howard%cpocd2.intel.com@RELAY.CS.NET
	One hand clapping sounds a lot like two hands clapping, only quieter.