Path: utzoo!utgpu!water!watmath!clyde!rutgers!mit-eddie!uw-beaver!tektronix!tekcrl!tekfdi!videovax!stever
From: stever@videovax.Tek.COM (Steven E. Rice, P.E.)
Newsgroups: comp.sys.amiga
Subject: Re: Still More 68020 Questions
Message-ID: <4795@videovax.Tek.COM>
Date: 20 Jan 88 22:25:37 GMT
References: <8801081459.AA16543@decwrl.dec.com> <8822@ccicpg.UUCP>
Reply-To: stever@videovax.Tek.COM (Steven E. Rice, P.E.)
Organization: Tektronix Television Systems, Beaverton, Oregon
Lines: 37

In article <8822@ccicpg.UUCP>, Harald Milne (harald@ccicpg.UUCP) replied
to some questions from article <8801081459.AA16543@decwrl.dec.com>, by
plouff@nac.dec.com (08-Jan-1988 0946).  Harald's answer to question
#2 needs some amplification:

>> 2.  Other than running self-modifying code, can one get in trouble 
>> running with the cache enabled?
> 
> 	Wow, I have not even considered cache coherency. What a HUGE can of
> worms.	If memory is written to without the CPU's knowledge, then that 
> "hit" in the cache is "dirty". For the 68020 this should not be a big deal.
> Self modifying code? You want to do this? (Ive done this to an 8080 to get
> to port addresses, but yucko!).
> 
> 	Now if we were talking about the 68030, we would be getting into big
> trouble, since the 68030 also caches data. The Amiga with all her
> coprocessors writing into memory, could not garentee data is not "dirty"
> without bus watching techniques (The same problem occurs in multi-processing
> environments).
> 
> 	I guess that means the 68030 cache has gotta go! 8^(

Fortunately, no!  There is an input, Cache Inhibit In (CIIN*), which
inhibits cacheing of data and/or instructions on a cycle-by-cycle basis.
By asserting CIIN* on each access to CHIP RAM, you will prevent the
cacheing of data (and instructions) that come from the area accessible
to the blitter, et. al.

As long as you keep your instructions, stack, and non-displayed data in
FAST RAM, you will still have the caches working for you.  8^)

					Steve Rice

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