Path: utzoo!utgpu!water!watmath!clyde!rutgers!sri-spam!ames!pasteur!ucbvax!hplabs!hp-pcd!uoregon!omepd!hah
From: hah@mipon3.intel.com (Hans Hansen)
Newsgroups: comp.sys.amiga
Subject: Re: Still More 68020 Questions
Message-ID: <2769@omepd>
Date: 29 Jan 88 01:56:13 GMT
References: <9750@ccicpg.UUCP> <3204@cbmvax.UUCP>
Sender: news@omepd
Reply-To: hah@inteloa.UUCP (Hans Hansen)
Organization: Intel Corp., Hillsboro
Lines: 28

In article <3204@cbmvax.UUCP> daveh@cbmvax.UUCP (Dave Haynie) writes:
$in article <9750@ccicpg.UUCP>, harald@ccicpg.UUCP ( Harald Milne) says:
$
$> 	Now the question is, is there a signal present that indicates
$> CHIP/FAST ram access? 
$> 
$> 	Is it present on the A2000 MMU conector?
$
$Basically.  To detect CHIP RAM for any CPU cycle, look at A23, A22, and A21.
$Are they all 0.  Yes?  You're accessing CHIP RAM.  No?  Not in CHIP RAM.
$<poof>
 
Not completely true.  The A500 and B2000 are inserting the additional 512K
of RAM inside of the CHIP memory port and it must be addressed with the
same constraints as CHIP RAM.  As such this additional 512K is not really
fast RAM.  For those who are new to the Amiga the A500 and B200 are looking
to the future when they will have the FAT AGNUS (addresses 1Meg instead of
the 512K that AGNUS addresses).  To make the conversion easy CA Engineering
have a jumper in the A500 and B2000 to change the addressing from $080000 to
$C00000.


$-- 
$Dave Haynie  "The B2000 Guy"     Commodore-Amiga  "The Crew That Never Rests"
$   {ihnp4|uunet|rutgers}!cbmvax!daveh      PLINK: D-DAVE H     BIX: hazy
$		"I can't relax, 'cause I'm a Boinger!"

Hans	hah@inteloa.UUCP