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From: aglew@ccvaxa.UUCP
Newsgroups: comp.arch
Subject: Re: More than 32 bits needed where?
Message-ID: <28200094@ccvaxa>
Date: 9 Feb 88 00:46:00 GMT
References: <4340@ames.arpa>
Lines: 26
Nf-ID: #R:ames.arpa:4340:ccvaxa:28200094:000:1291
Nf-From: ccvaxa.UUCP!aglew    Feb  8 18:46:00 1988


>It kind of makes me wonder about many of the whizzy new processors; why
>would anyone go to all the trouble to design and implement a new machine
>with only a 32-bit bus?  If the new machines are as fast as reputed, then
>probably Lisp users will want to run larger tasks than they can address.
>What shall I do when my Sun-4 (or whatever) has 4 gigabytes of swapping
>space and it's not enough?
>
>						-- Jay Freeman

Heartily second this emotion. Maybe the implementation should only have 
a 32 bit bus, but the architecture should make 64 bit work easier.
You can prepare for 64 registers by leaving spare opcodes, and by leaving
1 (or maybe 2) extra bits in your bitfield and shift instructions
- instead of a 5 bit shiftwidth, 6 (8 sounds even better).



Andy "Krazy" Glew. Gould CSD-Urbana.    1101 E. University, Urbana, IL 61801   
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