Newsgroups: comp.arch
Path: utzoo!henry
From: henry@utzoo.uucp (Henry Spencer)
Subject: Re: Cycle stretching
Message-ID: <1988Feb18.174450.16034@utzoo.uucp>
Organization: U of Toronto Zoology
References: <844@daisy.UUCP>
Date: Thu, 18-Feb-88 17:44:48 EST

> ... The remaining instructions need just a little longer--
> one clock plus a few nanoseconds.  Why not stretch the clock a bit when exec-
> uting those instructions, instead of wasting most of a second clock period?

Having several different clock periods used to be fairly routine in the
days when minis were built from TTL.  Some of the PDP11 family, for example,
had three different clock periods selectable on a microcycle-by-microcycle
basis.  It's gotten less popular nowadays because everything tends to be in
one chip that's invariably short of pins, and it's not as easy to just tap
one or two bits of the microword to control the clock.  It still can be 
done -- the Sun 3/100 series really does have 1.5 wait states for memory
accesses, even though the 68020 has no notion of fractional wait states,
because the clock generator knows about memory accesses and lengthens the
cycle.
-- 
Those who do not understand Unix are |  Henry Spencer @ U of Toronto Zoology
condemned to reinvent it, poorly.    | {allegra,ihnp4,decvax,utai}!utzoo!henry