Path: utzoo!utgpu!water!watmath!clyde!rutgers!rochester!bbn!uwmcsd1!ig!agate!ucbvax!hplabs!hp-pcd!uoregon!omepd!hah
From: hah@mipon3.intel.com (Hans Hansen)
Newsgroups: comp.sys.amiga
Subject: Re: 68030 Questions
Message-ID: <2817@omepd>
Date: 13 Feb 88 02:44:23 GMT
References: <4822@videovax.Tek.COM> <3291@cbmvax.UUCP>
Sender: news@omepd
Reply-To: hah@mipon3.UUCP (Hans Hansen)
Organization: Intel Corp., Hillsboro
Lines: 13

In article <3291@cbmvax.UUCP> daveh@cbmvax.UUCP (Dave Haynie) writes:
$in article <4822@videovax.Tek.COM>, stever@videovax.Tek.COM (Steven E. Rice, P.E.) says:
$> Summary: DMA is the *SLOW* way to go!
$Summary: DMA is still *FAST*er

What both of you are overlooking is the fact that the system w/o DMA must
do a task switch each time it goes to the well, (~50us/68000, ~30us/68020,
~20us/68030).  As the transfer data is coming in sloooooooowly the processor
is constantly switching tasks to service the "deadhead port" instead of
being left alone to calculate the next iteration of the Ray Tracing, setting
up the next pritty picture, balancing YOUR checkbook (sic).

Hans