Xref: utzoo comp.misc:1808 comp.sys.m68k:714 comp.sys.mac:11868 comp.sys.ibm.pc:11250
Path: utzoo!mnetor!uunet!lll-winken!lll-lcc!lll-tis!ames!rutgers!im4u!ut-sally!utah-cs!utah-gr!uplherc!esunix!sedwards
From: sedwards@esunix.UUCP (Scott Edwards)
Newsgroups: comp.misc,comp.sys.m68k,comp.sys.mac,comp.sys.ibm.pc
Subject: Re: The New Chips
Message-ID: <682@esunix.UUCP>
Date: 29 Jan 88 16:35:38 GMT
References: <686@uthub.toronto.edu>
Organization: Evans & Sutherland, Salt Lake City, Utah
Lines: 17

in article <686@uthub.toronto.edu>, koko@uthub.toronto.edu (M. Kokodyniak) says:
> Xref: esunix comp.misc:1903 comp.sys.m68k:708 comp.sys.mac:12460 comp.sys.ibm.pc:9936
> 
> In article <1430@husc2.UUCP>, sipples@husc2.UUCP (sipples) writes:
>> Instruction sets: the 68xxx is a little more RISC-like than the 80xx(x);
> Either a CPU is RISC or it isn't.  The 68xxx has an instruction set which
> is more orthogonal than that of 80xx(x).

Sheilds up, Mr. Sulu!

    The 68000 orthogonal?  ha ha ha Ha Ha Ha HA HA.

    I dare you find more that 4 operators that allow exactly the same
    set of operand sizes, sources and destinations.

    32xxx = almost orthogonal.
    80xxx = kind of, sort of orthogonal.
    680xx = orthogonal only in Motorola Ministry of Propaganda literature,
            otherwise a joke.