Path: utzoo!mnetor!uunet!seismo!sundc!pitstop!sun!amdcad!ames!ll-xn!mit-eddie!uw-beaver!cornell!rochester!PT.CS.CMU.EDU!andrew.cmu.edu!jk3k+ From: jk3k+@andrew.cmu.edu (Joseph G. Keane) Newsgroups: comp.arch Subject: Re: Cycle stretching Message-ID: Date: 19 Feb 88 03:56:01 GMT References: <844@daisy.UUCP> <20409@amdcad.AMD.COM>, <1232@alliant.Alliant.COM> Organization: Carnegie Mellon University Lines: 13 In-Reply-To: <1232@alliant.Alliant.COM> I've been thinking about making an asynchronous processor for a while. You need a lot of extra timing circuitry (i'd guess about double), but it mostly runs in parallel. I think eventually this idea will win out. You don't need any safety margin (`turn till it dies then back off a quarter turn'); the thing will always run as fast as possible. But can you imagine trying to benchmark the thing?! A couple weeks ago there was a talk here by someone who had apparently done just this. I'm kicking myself because i missed it. I suppose i could get a reference if anyone wants it. --Joe