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From: cik@l.cc.purdue.edu (Herman Rubin)
Newsgroups: comp.arch
Subject: Re: Condition Codes in General Registers
Summary: We need delayed branches
Message-ID: <685@l.cc.purdue.edu>
Date: 21 Feb 88 15:37:10 GMT
References: <6834@sol.ARPA> <780004@otter.hple.hp.com>
Organization: Purdue University Statistics Department
Lines: 18


The vaious examples of how well their computer does on the problem assumes
that the branch is immediate.  However, suppose that xyz is computed, and
several instructions later it is desired to branch on xyz = 0, and even
later, if xyz != 0, to utilize the sign?  If condition codes only go to
the condition code register, clearly additional work must be done.  I have
also encountered situations where a shift is performed, and later it is
desired to branch on an overflow occurring in the process.  Only having
the condition codes stored and branching on the stored condition code values
avoids unnecessary comparisons.

It would take little hardware modification for a processor which generates
condition codes to store them in a register when that is wanted, and to use
them from a user-controlled register instead of the condition code register.
-- 
Herman Rubin, Dept. of Statistics, Purdue Univ., West Lafayette IN47907
Phone: (317)494-6054
hrubin@l.cc.purdue.edu (ARPA or UUCP) or hrubin@purccvm.bitnet