Path: utzoo!utgpu!water!watmath!clyde!rutgers!ames!ucsd!sdcsvax!ucsdhub!hp-sdd!hplabs!pyramid!prls!mips!earl
From: earl@mips.COM (Earl Killian)
Newsgroups: comp.arch
Subject: Re: More than 32 bits needed where?
Message-ID: <1641@gumby.mips.COM>
Date: 21 Feb 88 21:32:43 GMT
References: <235@unicom.UUCP> <28200089@ccvaxa> <3104@watcgl.waterloo.edu> <3671@diku.dk> <1638@gumby.mips.COM> <401@imagine.PAWL.RPI.EDU>
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In-reply-to: jesup@pawl22.pawl.rpi.edu's message of 21 Feb 88 05:06:02 GMT

In article <401@imagine.PAWL.RPI.EDU> jesup@pawl22.pawl.rpi.edu (Randell E. Jesup) writes:

   >However, lest I appear to be arguing against 64-bit support, let me
   >first say that, in my opinion, every architecture designed after the
   >early 90s will be a 64-bit architecture.  Even PCs will probably use
   >64-bit architectures by the end of the 90s.  64 bit addresses and
   >integers are too important.

   I doubt it.  Maybe a few will, but PC's?  No way.  64-bit architectures
   have few or no advantages for PC work, even most mini work.  Supercomputers
   MIGHT decide they need it, but they mostly deal with FP stuff anyway.

Supercomputers made this decision 10-20 years ago.  "MIGHT" is hardly
appropriate.

   Remember, when you go to 64 bits EVERYTHING gets MUCH larger on the chip.
   this means larger chips, lower yields, more pins, etc, etc.  Also, ALU's
   get slower.  In a CISC, you might see some double-register operations, with
   multiple passes through the ALU, but not native.

The yields for a 64-bit cpu in the time frame I was talking about will
be hundreds of die per wafer.  Your arguments are simply why we have
32-bit processors TODAY.  Your same sentences could have been used 10
years ago to justify why micros would have to be 8-16 bits.  You'd have
been right, then, but if you'd said that meant micros would never be
32b, you'd have been dead wrong.

   When I see a PC with a gig of memory on it, actually USED, I might
   reconsider.

There were three papers last Friday at ISSCC on 16Mb DRAMs.  That's 2M
bytes per chip.  Even assuming they're sold as 4Mx4 parts, you'll use
8 of them to make a 32b wide memory.  Hence your PC will have 2x8 =
16M bytes of it, simply to satisfy the width requirements of the cpu.
That's the minimum; the maximum memory sold on a PC will probably be
many times higher; e.g. 128Mb, which is enough memory to be profitably
managed with a virtual address space > 4G.  64b micros will exist for
higher end applications than PCs, and it will be natural for the PC
industry to use them.

With the papers showing up this year, it'll be 4-6 years until the
16Mb DRAMs are on the market, and 6-8 years until they're common in
PCs.  32b PCs will have been around long with sufficient horsepower
that 75% of the applications will require that horsepower.  One of my
friends has an old Macintosh on his desk that he no longer even powers
on, mostly because it is no longer capable of running any of the
interesting new Macintosh software.  It can still run the software he
bought with it at the time, but that's no longer good enough.

Another interesting development at ISSCC: a 20ns CMOS DRAM.  Following
a paper last year on a 30ns BiCMOS DRAM, this suggests that our main
memory is FINALLY going to start keeping up with the recent surge in
processor performance.  20ns DRAMs will allow us to eventually build
small, cheap 250 mips micro-based systems.  Isn't it fun finally being
on the microprocessor growth curve, instead of that stodgy old
mini/mainframe growth curve?