Path: utzoo!mnetor!uunet!husc6!mit-eddie!uw-beaver!cornell!batcomputer!pyramid!voder!apple!baum
From: baum@apple.UUCP (Allen J. Baum)
Newsgroups: comp.arch
Subject: Re: Cycle stretching
Message-ID: <7443@apple.UUCP>
Date: 19 Feb 88 17:56:16 GMT
References: <844@daisy.UUCP> <20409@amdcad.AMD.COM> <1232@alliant.Alliant.COM>
Reply-To: baum@apple.UUCP (Allen Baum)
Organization: Apple Computer, Inc.
Lines: 19

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[]
>In article <1232@alliant.Alliant.COM> lackey@alliant.UUCP (Stan Lackey)writes:
>
>Actually, I once heard a proposal to make a microprocessor totally 
>ansynchronous, with logic added to determine when each stage of logic was
>complete, and use that to start the next stage.  It would take advantage of
>the fact that an ALU might be done sooner when adding small numbers, and lots
>of times the numbers added are small (compared to the total size of the 
>data path).  "Self-timed" is what it was called.
>
>An interesting idea, but likely wouldn't work too well in a pipeline, and
>would be difficult to interface to.  -Stan

Machines like this have been built (e.g. the Illiac II), but none recently.
Although people have talked about self-timed processors, I'm not aware of
any that have been built. Pieces of microprocessors are sometimes self-timed,
like register files and caches, but thats the extent of it.
--
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