Path: utzoo!mnetor!uunet!husc6!think!ames!ucsd!hub!amadeus!grosen
From: grosen@amadeus.ucsb.edu (Mark D. Grosen)
Newsgroups: comp.arch
Subject: Re: Self timed processors (was Re: Cycle stretching)
Message-ID: <378@hub.ucsb.edu>
Date: 22 Feb 88 04:01:04 GMT
References: <844@daisy.UUCP> <20409@amdcad.AMD.COM> <1232@alliant.Alliant.COM> <810@spar.SPAR.SLB.COM> <4979@nsc.nsc.com> <822@spar.SPAR.SLB.COM>
Sender: news@hub.ucsb.edu
Reply-To: grosen%amadeus@hub.ucsb.edu (Mark D. Grosen)
Organization: University of California, Santa Barbara
Lines: 16

People are working on asynchronous processors at UC Berkeley.  We had
Theresa Meng visit our department a couple weeks ago.  She (and others) have
developed a methodology for designing asynchronous processors that
eliminates races and hazards using handshaking.  Most of her work was aimed
at DSP processors.  She reported a 2x speedup of the TMS32010 using her
async design instead of the original clocked scheme. She should be finishing
her PhD dissertation soon, so that would be a reference to start with.

Mark


Mark D. Grosen		ARPA: grosen%filter@hub.ucsb.edu
Signal Processing Lab
ECE Dept.
University of California
Santa Barbara, CA  93106