Path: utzoo!mnetor!uunet!seismo!sundc!pitstop!sun!decwrl!labrea!aurora!eos!ames!hao!husc6!ut-sally!bcm!svedberg!rick
From: rick@svedberg.bcm.tmc.edu (Richard H. Miller)
Newsgroups: comp.arch
Subject: Re: Cycle stretching
Message-ID: <1023@uni2.bcm.tmc.edu>
Date: 22 Feb 88 22:16:22 GMT
References: <8802162251.AA20090@decwrl.dec.com> <3297@psuvax1.psu.edu>
Sender: usenet@bcm.tmc.edu
Lines: 19
Summary: clock streach

In article <3297@psuvax1.psu.edu>, przemek@gondor.cs.psu.edu (Przemyslaw Klosowski) writes:
> 
> Hey, I saw an old PDP (was it 8?) with a knob on the front panel, regulating
> the clock frequency! you are pressed for time? turn it clockwise! (probably
> at the expense of the error rate). I personally would rather implement it as
> a foot operated lever under the operator console...   :^)

We have a clock speed switch (two actually, a course speed and fine speed pot)
on the console of our KI-10. (PDP-10). The documentation indicates that the
speed control is used only for maintenance. It is always kept in the fastest
position during production. From reading the schematics of the processor, this
switch is usually used to diagnosis clock problems or timing problems in the
processor. 


Richard H. Miller                 Email: rick@svedberg.bcm.tmc.edu
Head, System Support              Voice: (713)799-4511
Baylor College of Medicine        US Mail: One Baylor Plaza, 302H
                                           Houston, Texas 77030