Path: utzoo!mnetor!uunet!lll-winken!lll-lcc!pyramid!prls!mips!mash From: mash@mips.COM (John Mashey) Newsgroups: comp.arch Subject: Re: RPM-40 microprocessor @ 40 MHz; data from ISSCC Message-ID: <1666@winchester.mips.COM> Date: 24 Feb 88 05:20:51 GMT References: <1642@mips.mips.COM> <409@imagine.PAWL.RPI.EDU> Reply-To: mash@winchester.UUCP (John Mashey) Organization: MIPS Computer Systems, Sunnyvale, CA Lines: 35 Keywords: General Electric, DARPA-MIPS-core-ISA In article <409@imagine.PAWL.RPI.EDU> beowulf!lunge!jesup@steinmetz.UUCP writes: ... >=or "Conditional Branch" instruction. Perhaps the "COND" instruction >=is the conditional-skip instruction recently mentioned on the net**. > Any of those displacements can be prefixed by PFX instruction(s) >to extend the displacement up to 32 bits. Yes, Cond conditionally skips >the next instruction, they can be 'stacked' to provide complex conditionals. I assume that cond skips the next instruction, including the PFX's?? > Minor error, there are 21 gp registers, plus a number of special >purpose registers, mostly reserved to supervisor mode. Several are stacks >for internal state mapped into register slots. User available registers >are the PC, Trap register, sr2 (has various flags), and the Size register >(determines the size of non-word LD/ST, allows some register remapping, >and a bit for doing 16-bit overflow detection instead of 32). How do you address more than 16 gp regs, given the encoding? > VERY rough figures is 1 rpm-40 @ 40Mhz is about equal to 7-9 >16Mhz 68020's with 0 wait-state memory and no MMU delay. (Not your standard >unix box envirionment 68020.) I.e., assuming that such 68020s are around 2 vax-mips, this sounds like about 14-18 vax-mips, roughly. >{ WARNING: this is VERY ROUGH, and though I have calulations available that > say this, they are very back-of-napkin style! However, it's > probably not TOO far off. Maybe we'll have real performance > figures at some point from GE (I don't work there anymore). } -- -john mashey DISCLAIMER: UUCP: {ames,decwrl,prls,pyramid}!mips!mash OR mash@mips.com DDD: 408-991-0253 or 408-720-1700, x253 USPS: MIPS Computer Systems, 930 E. Arques, Sunnyvale, CA 94086