Path: utzoo!mnetor!uunet!steinmetz!sunset!oconnor From: oconnor@sunset.steinmetz (Dennis M. O'Connor) Newsgroups: comp.arch Subject: Re: Longer quote, RPM-40 performance Message-ID: <9679@steinmetz.steinmetz.UUCP> Date: 25 Feb 88 05:49:37 GMT Sender: news@steinmetz.steinmetz.UUCP Reply-To: sunset!oconnor@steinmetz.UUCP Organization: GE Corporate R&D Center Lines: 83 Keywords: DAIS, 14 MIPS, General Electric An article by mark@mips.COM (Mark G. Johnson) says: ] To perhaps clarify what the ISSCC speaker claimed for ] performance on the GE "RPM-40" integer unit, here is a We call it the CPU. It can (and is) function quite nicely (IMHO :-) by itself, but is designed to work with the FPU and ... another thing. ] more extensive quotation of his presentation: ] "Somebody's going to ask, `What's that in real MIPS ?' We have ] done a comparison between this instruction set and this ] architecture on the 1750A DAIS MIPS (which is a standard Air ] Force mix of instructions) and our most pessimistic value on ] that is 14 MIPS." ] ] "We compare that with the best machines around and we're talking ] about at least a two or three to one speedup when using this ] technique --- although it's not a 1750, don't run away with ] that idea." The speaker, I think, was David K. Lewis of GE's Electronic Laboratory, one of the system architects and the head of the CPU effort. Let's be sure credit is given where due. (THIS IS NOT A FLAME, REALLY !) ] Now, what was meant by _the_best_machines_around_ ?? Possibilities ] include: ] 1. The other CORE-MIPS contractors (Unisys, McDonnell, TI) We and Unisys worked essentially "blind" to each other. So we don't know what their performance is, and they haven't said, yet. Comparison to the GaAs micros (McD, TI/CDC) is inappropriate, as they are not in the same development time-frame,last I heard. ] 2. Mil-spec 1750A machines running the DAIS mix ] 3. Mil-spec 68020's or 80286's with no wait states This is kinda it. What it really means is "two or three times the best DAIS performance anybody else has yet claimed". With the qualifications you mention later on : embedded-micros. ] 4. Top end VAX (8800?) emulating the DAIS mix ] 5. IBM and Amdahl machines emulating the DAIS mix ] 6. Cyber-190 or Cray-2 on integer code ( Humor mode ) Yes, this is it : we're twice as fast as a CRAY-2 on the DAIS mix. And it comes in a 64 pin DIP, draws only 250mW, and costs only $19.95 in quantity ten. Uh, cash in advance ONLY ... :-) ] To me, (2.) seems most likely, as this would imply a performance of ] 4.7 - 7 MIPS for existing mil-spec 1750A processors (on the DAIS mix). Best number I'd heard from a REAL 1750A was 2 DAIS MIPS, for Performance Semiconductor's 20MHz CMOS chip. ] It would also be the sort of military-embedded-computer vs. ] military-embedded-computer comparison that would be most interesting ] to the RPM-40's potential customers. Machines 4-6, which arguably ] include some of "the best machines around" for running operating systems ] and/or integer programs, aren't optimized to fit in the nosecone of a ] missile, fly through clouds of radiation, and run an Ada program ] to "track the BadGuy, collide with him, & go Bang". ( Side note : if you can collide with the BadGuy at orbital-intercept relative-velocities, it is not neccesary that you also go "Bang" :-) Your dead on target. RPM40 is NOT a VAX-killer or SUN competitor. Here at GE, we don't compare Massey-Fergussen 1500-horsepower tractors to nitrobenzene-burning top-fuel funny cars. It would be tough to build a micro that would be best for everyone. What's more important, throughput or latency ? Speed or power ? System package count or package pin count ? We tried to design the best little embedded-system micro we could (within contract constraints) and we think we did a good job. Hey, but criticize it, please : I'd like the next one to be EVEN BETTER ! ] -- MJ -- Dennis O'Connor oconnor@sunset.steinmetz.UUCP ? ARPA: OCONNORDM@ge-crd.arpa (-: The Few, The Proud, The Architects of the RPM40 40MIPS CMOS Micro :-)